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Low Power Embedded Systems. Edition No. 1

VDM Publishing House, March 2008, Pages: 128

As the demand for multimedia applications has increased, embedded processor designs have evolved to provide high performance on media processing algorithms, such as image processing, video compression and decompression, voice processing, wireless communication, and so on. Cache memory and TLB memory systems are a key mechanism for improving overall system performance and low power consumption. A cache exploits the locality inherent in the reference stream of a typical application. Two primary types of locality are available, and the degree to which they can be exploited depends on program execution characteristics. The translation look-aside buffer (TLB) is an on-chip memory structure that caches only page table entries for recently used virtual to physical address translations. If the necessary translation information exists in the TLB, the system can translate an address without accessing the page table. Flash memory is non-volatile and can retain data even after system is powered off. Besides, it has many other features such as fast access speed, low power consumption, attractive shock resistance, small size, and lightweight.

Md. Mokhlesur , Rahman.
Md.Mokhlesur Rahman, a Research Associate of Development Research Network (D.Net), Bangladesh completed his MA in Development Studies from ISS, Netherlands, and BA in Economics from India. Prior to D.Net, he also worked with PRIP Trust and BRAC Afghanistan. His areas of interest are Civil Society, Gender and Capacity Building.