This book surveys the automata theoretic techniques that are required for model checking and satisfiability of expressive extensions of LTL that are used in specification of hardware designs. The motivation for studying these issues was the work done in Intel on a specification language for hardware model checking that extends LTL, later to be named ForSpec. While ForSpec does not include automata as temporal connectives, the backend tool, that handles the translation of ForSpec does. This led to the renewed study of automata connectives, and how to best handle them with alternating automata.
Dr Nir Piterman received his PhD in Computer Science from the Weizmann Institute of Science, Rehovot, Israel, in 2004. His research interests include formal verification, automata theory, model checking, temporal logic, design synthesis, game solving, and the application of formal methods to biological modelling.