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Thin Wafer Market & Applications 2011
Yole Development, Oct 2011, Pages: 216
27% of total processed semiconductors are thinned today. In 2016, this ratio will exceed 50%!
THIN WAFERS TARGET MANY APPLICATIONS
Thin wafers will be increasingly used in many diverse applications. The “Thin Wafer Applications” report describes the applications that require thin and ultra-thin wafers: MEMS, CMOS Image Sensors, 3D Packaging (incl. Interposers), Memories, RF Devices, Power Devices and LEDs.
While Memories & Logic will account for the largest fraction of thinned wafers, many other applications are concerned.
MEMS are always characterized by a wide range of process and technologies. This is certainly the application where the widest range of wafer thickness can be found (e.g. the 3-axis gyro from InvenSense is a stack of 3 wafers with intermediate layer of 33µ thickness). To answer the need for thinner sensors for cell phone applications, capping, sensitive elements and MEMS ASIC will get thinner over the next years, specifically for inertial MEMS. For CMOS Image Sensors (CIS), Backside Illumination (BSI) now enables 100% Fill-factor, which opens the opportunity for CMOS sensor with higher Sensitivities or Higher Resolution. But we need to handle VERY thin layer as for a BSI CIS, the active layer is < 10µ. CIS wafers will also be thinner for packaging purposes (TSV, WLCSP).
Memories can be stacked in different ways: wire bonding or TSV. 3D stacking is the next big thing for memory integration with thickness as low as 25µ in 2016. But wire bonding will still be used for a few years and TSV volume will start to be significant in 2013.
Main Power Devices requiring thin wafers are IGBTs but others power devices could use thin wafers. For Power Devices, thin wafers allow low Ron, thus improve current carrying capability and minimize power consumption. For LEDs, GaAs, sapphire and SiC wafers are thinned as well.
MARKET DRIVERS FOR THIN WAFERS
Motivations for thin wafers are: high interconnect density (such as aggressive TSV pitch & diameters), better power dissipation and higher electrical performance and reduced package size.
Consumer electronics are driving the need for smaller, higher performing, lower cost device configurations for use in applications such as memory, wireless devices... These new options, in turn, are pushing demand for a reduction in chip thickness from the traditional 500µ thickness to about 40 µm. Thin dies are driving the need for thin and even ultra-thin semiconductor wafers (below 50µm).
Such dramatic changes will have strong impact on the equipment and materials side as well as new process and bonding technologies will be required for handling such fragile wafers. Yole has covered the equipment and processing aspects in the previous “Thin Wafer Manufacturing” report.
KEY FEATURES OF THE REPORT
The objectives of the report are the following:
Provide an understanding of the thin wafer applications:
- Overview of the thin wafer applications: MEMS, CMOS Image Sensors, Memories, Power Devices, RF Devices, LEDs, Interposers
- Thin wafers roadmaps
Give market forecasts for thin wafers:
- 2011-2016 Market Forecast in units and US$ for thin wafers
- Detailed forecasts by application, wafer size and thickness
Analyze the trends for wafer thinning
- Thinning technologies overview
- Players
WHO SHOULD BUY THIS REPORT?
Foundries & chip manufacturers
- Get an overview of the large panel of accessible applications for thin wafers
- Identify the key trends into wafer thickness reduction
- Monitor and benchmark your competitor’s advancements
Thinning tools/services & materials (chemistry, wafers) providers
- Identify and evaluate what the requirements for thinning wafers will be
- Analyze the threads and opportunities
- Evaluate the market value and volume
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