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CMOS Nanoelectronics: Innovative Devices, Architectures and Applications
Pan Stanford Publishing Pte. Ltd, Jan 2012, Pages: 300
This book covers one of the most important device architectures that have been widely researched to extend the transistor scaling: FinFET. Starting with theory, the book discusses the advantages and the integration challenges of this device architecture. It addresses in detail the topics such as high-density fin patterning, gate stack design, and source/drain engineering, which have been considered challenges for the integration of FinFETs. The book also addresses circuit-related aspects, including the impact of variability on SRAM design, ESD design, and high-T operation. It discusses a new device concept: the junctionless nanowire FET.
About the Author
Nadine Collaert received her MS and PhD degrees in electrical engineering from the ESAT Department, Catholic University Leuven, Leuven, Belgium, in 1995 and 2000, respectively, where her PhD thesis was related to the modeling and characterization of a new transistor concept, the vertical Si/SiGe heterojunction MOSFET. She works as a senior researcher with IMEC, Leuven. She has been involved in the theory, design, and technology of FinFET-based multigate devices and emerging memory devices. Her current research interests include the design and integration of biosensors, transducers, and actuators and the integration and characterization of biocompatible materials, e.g., carbon-based materials. She has authored and coauthored more than 230 papers in international journals and conference proceedings.
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