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Design and Test for Multiple Gbps Communication Devices and Systems
IEC Publications, Oct 2005, Pages: 497
Design and Test for Multiple Gbps Communication Devices and Systems focuses on the latest multiple Gbps communication technologies and applications—from design to test—and covers the essential elements of device and system development (architecture, simulation and modeling, design techniques, and testing).
Currently, the data rate for communication systems continues to increase. In the network area, 10- and 40-Gbps devices and systems are now available for Gigabit Ethernet and SONET. In the computer area, I/O buses at 2.5 and 3 Gbps are common for PCI Express and Serial ATA, respectively, with higher-speed I/O buses at up to 4.8 Gbps on the horizon. Such data-rate increases suggest a growing demand for higher-speed applications and create greater challenges that affect system architectures, design methods, simulation and modeling methods, and test and measurement methods.
With Design and Test for Multiple Gbps Communication Devices and Systems in hand, you will learn and master the basics of today's design and test methodologies and techniques. With this enhanced knowledge, you will be able to more fully understand the current challenges facing today's practitioners, as well as which existing solutions are best to combat those challenges. This will help you to choose the right methods and tools for your designs and tests and will enable you to achieve greater efficiency, higher performance, and higher yields. This will ultimately lead to fewer device respins, faster times to market, on-time delivery, and higher overall productivity.
This collection of acclaimed papers from leading experts in industry and academia maintains a good balance between theory foundation and practical applications, with a strong emphasis on signal integrity and jitter, while presenting the latest technologies, methodologies, and advancements in design and test for multiple Gbps devices and systems.
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