Market Research Reports - Research and Markets

Welcome - Register - Login - Help/FAQ - 0 items

Search
Enter keywords, a title or
a report id number below.


	Select a currency for use throughout the site

Search Results

Your Search for 'Engineering a Compiler. Edition No.' returned 4 results - Page 1 of 1

MEMORY HIERARCHY DESIGN FOR CHIP MULTIPROCESSORS. Edition No. 1
VDM Publishing House, Dec 2008, Pages: 156 MEMORY HIERARCHY DESIGN FOR CHIP MULTIPROCESSORS. Edition No. 1 This book presents memory hierarchy design and data access management methodology. First, memory hierarchy design and data allocation

Conquer Compiler Complexity. Edition No. 1
VDM Publishing House, May 2008, Pages: 172 Conquer Compiler Complexity. Edition No. 1 With an aim to address the modularity problems in language implementations, this thesis presents a new language implementation formalism and archetype that

SATH: Simulated Annealing C code To FPGA Hardware compiler. Edition No. 1
VDM Publishing House, July 2009, Pages: 132 SATH: Simulated Annealing C code To FPGA Hardware compiler. Edition No. 1 A tool flow is presented for deriving accelerator circuits on an FPGA from ANSI C source code by exploring architecture

Project Management, Planning and Control. Edition No. 5
Elsevier Science and Technology, Sep 2006, Pages: 464 Project Management, Planning and Control. Edition No. 5 Fully aligned with the latest 2006 Project Management Body of Knowledge (PMBOK) for both the Project Management Institute (PMI) and the

Results:

First -

Prev -

1 -

Next -

Last

For enquiries please call us on:

+353-1-415-1241 (GMT Office Hours)

1-800-526-8630 (US/Canada Toll Free)

1-917-300-0470 (EST Office Hours)