Skew-Tolerant Circuit Design. The Morgan Kaufmann Series in Computer Architecture and Design

  • ID: 1763406
  • Book
  • 300 Pages
  • Elsevier Science and Technology
1 of 4

As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of clocks. Increasing clock frequencies are forcing many engineers to rethink their timing budgets and to use skew-tolerant circuit techniques for both domino and static circuits. While senior designers have long developed their own techniques for reducing the sequencing overhead of domino circuits, this knowledge has routinely been protected as trade secret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers. This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.

  • Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial
  • Provides incisive instruction and advice punctuated by humorous illustrations
  • Includes exercises to test understanding of key concepts and solutions to selected exercises

Please Note: This is an On Demand product, delivery may take up to 11 working days after payment has been received.

Note: Product cover images may vary from those shown
2 of 4
Chapter 1
Introduction
Chapter 2
Fundamental Concepts
Chapter 3
IP Switching
Chapter 4
Tag Switching
Chapter 5
MPLS Core Protocols
Chapter 6
Quality of Service
Chapter 7
Constraint­based routing
Chapter 8
Virtual Private Networks
Note: Product cover images may vary from those shown
3 of 4

Loading
LOADING...

4 of 4
Harris, David
David Money Harris is an associate professor of engineering at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II processors. Since then, he has consulted at Sun Microsystems, Hewlett-Packard, Evans & Sutherland, and other design companies.

David's passions include teaching, building chips, and exploring the outdoors. When he is not at work, he can usually be found hiking, mountaineering, or rock climbing. He particularly enjoys hiking with his son, Abraham, who was born at the start of this book project. David holds about a dozen patents and is the author of three other textbooks on chip design, as well as two guidebooks to the Southern California mountains.

Note: Product cover images may vary from those shown
5 of 4
Note: Product cover images may vary from those shown
Adroll
adroll