- Clocking in synchronous systems including on–chip clock generation, timing parameters, and clock signal distribution
- Latch–based and Flip–Flop derivation
- Clock–to–output delay tcq
- Pipelining and timing analysis
- Absorbing clock uncertaintites and dynamic time borrowing
- Low–swing circuit techniques, clock gating, and dual–edge triggering
- Simulation techniques including HLFF and M–SAFF sizing and CSE simulation bench in SPICE
- Clocked storage elements in CMOS technology
- The associated website provides materials for Instructors
With numerous microprocessor examples including clocking for Intel®, Sun Microsystems’s UltraSPARC®–III, and IBM processors, Digital System Clocking: High–Performance and Low–Power Aspects provides much–needed answers about a technology that stands as a centerpiece of digital system design.
Theory of Clocked Storage Elements.
Timing and Energy Parameters.
Pipelining and Timing Analysis.
High–Performance System Issues.
Low–Energy System Issues.
State–of–the–Art Clocked Storage Elements in CMOS Technology.
VLADIMIR M. STOJANOVIC is currently pursuing his PhD degree as a member of the VLSI research group, Electrical Engineering Department, Stanford University. He obtained MSEE degree from Stanford University and Dipl Ing diploma from Faculty of Electrical Engineering, University of Belgrade, Serbia. He was a research scholar at ACSEL.
DEJAN M. MARKOVIC received an Dipl Ing degree in Electrical Engineering from the University of Belgrade, Yugoslavia, in 1998 and an MS in Electrical Engineering from the University of California at Berkeley in 2000, where he is currently working toward a PhD. Mr. Markovic received the 2000–2001 CalVIEW Fellow Award for excellence in teaching and mentoring of industry engineers through the UC Berkeley distant learning program. He is a current member of the UC Berkeley Hitachi Fellow Team, conducting market research on Hitachi?s Mu–Chip RFID technology.
NIKOLA NEDOVIC is currently pursuing his PhD in the Department of Electrical and Computer Engineering at the University of California, Davis. He was a research scholar at ACSEL, and has been published in seven papers.