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TDK-EPC P8009 Module with Maxim Embedded Dies

  • ID: 2563613
  • Report
  • Region: Global
  • 100 Pages +
  • System Plus Consulting
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- One of the few high volume 3D embedded dies package
- Latest evolution of the TDK SESUB Process

TDK-EPC and Maxim Integrated have joined forces to provide an innovative power management solution with an embedded die technology.

Integrated in some version of the BlackBerry Z10, the P8009 Power Management Unit (PMU) of TDK-EPC is one of the few high-volume embedded dies package. It integrates two ICs from Maxim Integrated, a power management IC (PMIC) and a 16-bit MCU, to reduce the module size by 60% compared to using conventional discrete devices and BGA packages.

The embedded die process of TDK-EPC, called SESUB (Semiconductor embedded in SUBstrate), is an innovative packaging technology based on the emerging embedded die in laminate substrate concept where all of the package assembly operations are done at the panel-scale level. A 4-layer 3D interconnection routing path with 20µm minimum line width is provided. This technology extends the package size beyond the ICs surface area and allows for mounting additional passives components on top of the laminated module.

With this packaging approach, TDK considerably changed the conventional supply chain model, where the chip maker sells directly to the system maker. Here the module maker is taking a larger role by adding considerable value.

This report provides a complete teardown of the embedded dies package with:

- Detailed photos & Material analysis
- Schematic assembly description
- Manufacturing Process Flow
- In-depth manufacturing cost analysis
- Supply chain evaluation
- Exhaustive cost breakdown and selling price estimation
Note: Product cover images may vary from those shown
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Companies Profile

P8009 Characteristics & Supply Chain

P8009 Physical Analysis

- Physical Analysis Methodology
- Module Views & Dimensions
- Passives Components & Functions
- Module Delamination
- MAX8955E - Die View, Dimensions & Marking
- MAX8955E - Die Process
- MAXQ6831 - Die View, Dimensions & Marking
- MAXQ6831 - Die Process
- Cross-Section 1 Overview
- Cross-Section 1 - Complete PCB
- Cross-Section 1 - Layer 1-2
- Cross-Section 1 - Layer 2-3
- Cross-Section 1 - Layer 3-4
- Cross-Section 2 Overview
- Cross-Section 2 - Shield Case
- Cross-Section 3 Overview
- Cross-Section 3 - MAX8955E
- Cross-Section 3 - MAXQ6831

Manufacturing Process Flow

- Global Overview
- MAX8955E Process
- MAXQ6831 Process
- ICs Wafer Fabrication Units
- SESUB Embedded Die Packaging Process Flow
- SESUB Panel Fabrication Unit
- Passives Assembly Process Flow

Cost Analysis

- Main steps of economic analysis
- Yields Hypotheses
- MAX8955E Front-End Cost
- MAX8955E Back-End 0 : RDL, Probe Test, Thinning & Dicing
- MAX8955E Die Cost
- MAXQ6831 Front-End Cost
- MAXQ6831 Back-End 0 : RDL, Probe Test, Thinning & Dicing- MAXQ6831 Die Cost
- SESUB Panel Cost
- SESUB Panel Cost per process steps
- SESUB Panel : Equipment Cost per Family
- SESUB Panel : Material Cost per Family
- SESUB Panel : Panel Efficiency
- SESUB Packaging Cost per Module
- Passives Components Cost
- Passives Assembly Cost
- P8009 Module Cost & Price
Note: Product cover images may vary from those shown
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Note: Product cover images may vary from those shown
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