The memory die comes in Narrow Small Outline Integrated Circuit (SOIC) packaging. We have analyzed devices from 32 kbit to 512 kbit @1MHz speed, and found they all have, surprisingly, the same die size. Another interesting thing is the integration of one transistor, one resistor (1T1R), type memory with innovative materials, leading to easy CMOS integration.
This report analyzes the complete component, from the package to the die developed by Adesto Technologies and licensed by Infineon. The report includes a complete analysis of the resistive layer which forms the memory cells. We use cross-sections of the die and removal of the metal layers to understand the technology. We also provide a complete description of the memory cell process to explain the manufacturing.
Finally, the report includes a complete cost analysis and a selling price estimation of the CBRAM components.