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VLSI and Post-CMOS Devices, Circuits and Modelling. Materials, Circuits and Devices

  • Book
  • August 2019
  • IET Books
  • ID: 4756145

VLSI, or Very-Large-Scale-Integration, is the practice of combining billions of transistors to create an integrated circuit. At present, VLSI circuits are realised using CMOS technology. However, the demand for ever smaller, more efficient circuits is now pushing the limits of CMOS. Post-CMOS refers to the possible future digital logic technologies beyond the CMOS scaling limits. This book addresses the current state of the art in VLSI technologies and presents potential options for post-CMOS approaches.

The book begins by discussing low-voltage low-power VLSI design, then goes on to cover through silicon via interconnects for 3D integration. Coverage further includes modelling and simulation for post-CMOS device and circuit design, high-performance compound semiconductor devices and applications, process variability in FinFETs, and other novel and emerging technologies. VLSI and Post-CMOS Devices, Circuits and Modelling is a useful reference guide for researchers, engineers and advanced students working in the area of design and modelling of VLSI and post-CMOS devices and their circuits.

Table of Contents

- Section 1: Low Voltage and Low Power VLSI Design
- Chapter 1: Low Voltage Analog Signal Processing
- Chapter 2: Negative Bias Temperature Instability (NBTI) Aware Low Leakage Circuit Design
- Chapter 3: Low Voltage, Low Power SRAM Circuits using Sub-threshold Design Technique
- Chapter 4: Design and Analysis of Memristor based DRAM Memory Cell for Low Power Application
- Chapter 5: Design of a Novel Tunnel FET for Low Power Applications
- Chapter 6: Composite PFD based Low Power Low Noise Fast Lock in Phase Locked Loop

- Section 2: Through Silicon Via Interconnects for 3-Dimensional Integration
- Chapter 7: Modeling Interconnects for Future VLSI Circuit Applications
- Chapter 8: Nano-Magnetic Computing for Next-generation Interconnects and Logic Design
- Chapter 9: Prospective Current Mode Approach for On-chip Interconnects in Integrated Circuit Designs
- Chapter 10: Design of Through Silicon Vias for Improved Performance in 3-D IC Applications
- Chapter 11: Prospective Graphene Based Through Silicon Vias in 3-Dimensional Integrated Circuits

- Section 3: Modeling and Simulation for post-CMOS Device and Circuit Design
- Chapter 12: Emerging Devices for Beyond CMOS: Fundamentals, Promises and Challenges
- Chapter 13: Two-Dimensional Material Based Field-Effect Transistor for post-Silicon Electronics
- Chapter 14: Theory and Modeling of Spin-transfer-torque based Electronic Devices
- Chapter 15: Spintronics Memory and Logic: An Efficient Alternative to CMOS Technology
- Chapter 16: Tunneling Field Effect Transistors for Energy Efficient Digital, RF and Power Management Circuit Designs for IoT Edge Computing Devices
- Chapter 17: High Performing Metal-oxide Semiconductor Thin Film Transistors
- Chapter 18: CNTFETs: Modeling and Circuit Design

- Section 4: High-Performance Compound Semiconductor Devices and Applications
- Chapter 19: III-V Compound Semiconductor Transistors-From Planar to Nanowire Structures
- Chapter 20: UTB III-V-OI-Si MOS Transistor: The Future Transistor for VLSI Design
- Chapter 21: Assessment of SiGe/ Si Heterojunction Tunnel Field Effect Transistor for Digital VLSI Circuit Applications
- Chapter 22: Simulation Framework for GaN Devices with Special Mention to Reliability Concern

- Section 5: Process Variability in FinFETs: Challenges and Mitigation
- Chapter 23: Impact of Oxide Thickness Variationon the Performance of Junctionless FinFET
- Chapter 24: Design and Analysis of Variability aware FinFET Based SRAM Circuit Design

- Section 6: Emerging Technologies for Integrated Circuit Design
- Chapter 25: Radiation-hard Circuit Design: Flip-flop and SRAM
- Chapter 26: Phase Change Memory: Electrical Circuit Modeling, Nano-crossbar Performance Analysis and Applications
- Chapter 27: Methods to Design Ternary Gates and Adders
- Chapter 28: Single EX-CCCII Based Square/Triangular Wave Generator for Capacitive Sensor Interfacing and Brief Review
- Chapter 29: Transient Fault Secured/ Tolerant Architecture for DSP Core


Rohit Dhiman Assistant Professor. NIT Hamirpur, Electronics & Communication Engineering Department, India.

Rohit Dhiman is an Assistant Professor in the Electronics & Communication Engineering Department at NIT Hamirpur, India, and is the author/co-author of over 30 publications in international journals and conference proceedings. His main research interest is in device and circuit modelling for low power VLSI design.

Rajeevan Chandel Professor. National Institute of Technology (NIT) Hamirpur, India.

Rajeevan Chandel is Professor and Dean (Research & Consultancy) at the National Institute of Technology (NIT) Hamirpur, India. She has over 150 research papers in peer reviewed international journals and conferences. Her research interests are electronics circuit modelling and low power VLSI design.