Automotive Intelligent Cockpit SoC Research Report, 2025

Cockpit SoC research: The localization rate exceeds 10%, and AI-oriented cockpit SoC will become the mainstream in the next 2-3 years

In the Chinese automotive intelligent cockpit SoC market, although vendors such as Qualcomm, Renesas, and AMD still dominate, the localization rate is also rapidly increasing. According to the publisher's statistics, the localization rate of intelligent cockpit SoCs in 2024 has exceeded 10%, with domestic vendors represented by SemiDrive, Huawei HiSilicon, and SiEngine rapidly rising. Automotive intelligent cockpit SoCs are entering a product upgrade cycle, with AI-oriented cockpit SoCs expected to become mainstream in the next 2-3 years

Automotive intelligent cockpit SoC chips are entering a product upgrade cycle, with key development directions including:

The mainstream chip process is advancing from 7nm to 4nm and below. In 2024, chips with 7nm and below processes accounted for 36%, and this figure is expected to exceed 65% by 2030. The next generation will shift toward 4nm and 3nm processes. Compared to the currently widely used 7nm and 5nm chips, 4nm offers significant improvements in transistor density, performance, and power efficiency, better supporting high-throughput, continuous AI computing tasks for AI cockpits across various application scenarios.

The emergence of integrated cockpit-driving SoCs that support AI cockpits and high-level autonomous driving, such as NVIDIA DRIVE Thor, Black Sesame’s 'Wudang' C1200 series, Qualcomm’s SA8795P/SA8775P series, and MediaTek’s CT-X1 (MT8678).

AI-oriented cockpit SoCs will become mainstream in the next 2-3 years, driving the evolution of on-device models from the current 1B-1.5B language models to 7B-10B multimodal models. Examples include SemiDrive’s X10, MediaTek’s MT8676, Samsung’s Exynos Auto V920, Qualcomm’s 8397 (Snapdragon Cockpit Elite), and Intel’s Panther Lake.

Taking SemiDrive as an example, it unveiled its next-generation AI cockpit chip X10 at the 2025 Shanghai Auto Show. This SoC adopts an advanced 4nm process and supports on-device deployment of a 7B-parameter multimodal large model. The X10 series chips are scheduled to enter mass production starting in 2026.

In terms of specifications, the SemiDrive X10 series products feature an ARMv9.2 CPU architecture optimized for AI computing, delivering CPU performance of up to 200K DMIPS. Simultaneously, the X10 integrates a 1800 GFLOPS GPU and a 40 TOPS NPU, equipped with a 128-bit LPDDR5X memory interface running at 9600 MT/s, providing the entire system with a massive bandwidth of 154 GB/s - more than double that of current flagship mass-produced cockpit chips.

The biggest challenge for AI cockpits lies in the on-device deployment of 7B multimodal large models. The performance requirement for deploying a 7B multimodal model on-device is to output the first token within 1 second under a 512-token input length and sustain a speed of 20 tokens per second. This demands that cockpit processors possess NPU computing power of around 30-40 TOPS, paired with DDR bandwidth of approximately 90 GB/s. While existing high-performance cockpit SoCs on the market meet some of the NPU performance requirements, their memory bandwidth mostly falls in the 60-70 GB/s range, making it difficult to support the deployment of 7B models.

The SemiDrive X10 focuses on the core demands of AI cockpit scenarios: 'fast response for small models, multimodal interaction for medium-sized models, and complex tasks for cloud-based large models.' It addresses the bottlenecks in computing power and bandwidth faced by traditional cockpit chips. In terms of computing power and bandwidth configuration, it emphasizes meeting the requirements for on-device deployment of 7B multimodal models, delivering 40 TOPS of NPU computing power paired with an ultra-large bandwidth of 154 GB/s, ensuring the full performance potential of large models.

Regarding the development toolchain, the X10’s accompanying AI toolchain covers functions such as compilation, quantization, simulation, and performance analysis, significantly reducing the cycle for model deployment and performance optimization. Additionally, the X10’s SDK provides a universal standardized model invocation interface, simplifying the development and migration of AI applications and enabling plug-and-play AI functionality. This ecosystem strategy aims to lower development barriers, offering automakers, algorithm providers, and application developers flexible customization options to accelerate the adoption of AI technology in cockpit scenarios.

The integration level of automotive intelligent cockpit SoC chips continues to increase

Represented by companies like Qualcomm and MediaTek, vendors are beginning to integrate 5G modems, WiFi 7, Bluetooth, and V2X modules into smart cockpit SoCs. This enables the convergence of high-speed connectivity and intelligent computing capabilities on a single chip, improving the real-time performance, multitasking capabilities, and user experience of in-vehicle systems. At the same time, it helps OEMs reduce costs by eliminating the need for external T-Box units.

Taking the D9000 co-developed by BYD and MediaTek as an example, it integrates:

• Integrated 5G Modem: Incorporates MediaTek's M80 baseband, supporting Sub-6GHz bands with downlink speeds up to 7 Gbps, while maintaining compatibility with 2G-4G networks.
• Wi-Fi 7: Theoretical peak rate of 6.5 Gbps, supporting dual-band concurrency.
• Bluetooth 5.3: Enables low-power connectivity for in-vehicle sensors and peripherals.
• BYD's flagship models, including the Bao 8, Denza Z9, Denza N9, and Yangwang U7, have all adopted the D9000.

On the other hand, cockpit SoC SIP packaging modules are rapidly gaining traction. With increasing power demands and growing component complexity, traditional COB designs face challenges in PCB reliability, thickness control, and warpage management. SIP packaging, through BGA ball mounting technology, backside capacitor design, and extensive underfill process expertise, effectively addresses hardware design, manufacturing, and reliability challenges, ensuring stable operation in harsh environments.

Cockpit SoC SIP packaging modules come in two forms:

(1) SIP modules directly offered by chip vendors, represented by Qualcomm, which provides products like the QAM8255P module and QAM8775P module. Taking the QAM8255P module as an example, its core components include:

• SA8255P SoC: Main processing chip.
• Power management unit: 4- Qualcomm-developed PMM8650AU power management IC + 1* third-party ASIL-D compliant power management chip (likely from NXP or Infineon).
• Memory: Micron LPDDR5, 12GB capacity.

(2) SIP module solutions from module manufacturers, such as Quectel's 48 TOPS high-computing 5G smart cockpit integrated solution module AS830M. The AS830M is developed based on the Qualcomm Snapdragon 8 Gen 2 and employs advanced SiP (System-in-Package) technology combined with BGA (Ball Grid Array) ball mounting, significantly reducing hardware design complexity.

The AS830M integrates 5G, Wi-Fi 7, and BT5.3 technologies, delivering efficient data transmission and connected vehicle capabilities.